PRIMARIUS - PCellLab

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SPICE Model

Baseband Modeling
? BSIMProPlus

RF Modeling
? MeQLab

Model Extraction Automation
? SDEP

Model QA
? ME-Pro
PDK

PCell Development
? PCellLab

PDK Verification
? PQLab
Standard Cell

Library Characterization
? NanoCell

Library Validation
? LibWiz
Fabrication

Lithography Modeling and Simulation
? FabLitho

Reticle Automated Design
? FAR

Design Environment

Schematic Capture
? NanoDesigner SE

Layout Editor
? NanoDesigner LS

Interactive Physical Verification
? NanoDesigner?iV

Design Optimization
? NanoDesigner?Optimizer
Circuit Simulation

SPICE Simulator
? NanoSpice ? NanoSpice X ? NanoSpice Giga

FastSPICE Simulator
? NanoSpice Pro ? NanoSpice Pro X

Mixed Signal
? NanoSpice MS

Waveform Analysis
? NanoWave
Circuit Analysis

Static and Dynamic Circuit Check
? NanoSpice CCK

Yield Analysis
? NanoYield

Signal Integrity
? NanoSpice?SI

Critical Path Analysis
? PathInspector

Power Device Design Verification
? PTM

Power Distribution Network Analysis

ESD Verification
? ESDi

Circuit Simulation

Digital Simulation
? VeriSim
Standard Cell

Library Characterization
? NanoCell

Library Validation
? LibWiz
Design & Verification

Timing Analysis
? TRASTA

Floor Planning
? NavisPro

Signal Integrity Analysis
? NanoSpice SI

Power Design Analysis
? PTM

ESD Verification
? ESDi

Chip-to-Package Connectivity Verification
? PadInspector

Parametric Testing

Semiconductor Parametric Analyzer
? FS-Pro ? FS800
Noise Measurement

Low Frequency Noise
? 9812DX ? 9812E ? 9812HF

AC Dynamic Noise
? 9812AC
Integrated Testing

Electrical Parameter Testing Software
? LabExpress

PDK

Home Products Fab EDA

SPICE Model

Baseband Modeling

BSIMProPlus

RF Modeling

MeQLab

Model Extraction Automation

SDEP

Model QA

ME-Pro
PDK

PCell Development

PCellLab

PDK Verification

PQLab
Standard Cell

Library Characterization

NanoCell

Library Validation

LibWiz
Fabrication

Lithography Modeling and Simulation

FabLitho

Reticle Automated Design

FAR

PCellLab | PQLab

PCellLab

Parameterized Cell Library Development Platform

PCell Development Flexible GUI Build-in Development Templates

PCellLab is an automated development platform with complete PCell development functions and advanced technology.

Comprehensive built-in PCell development templates and user-friendly graphical interface
PCell code can be automatically generated according to the process and design parameters inputted by users
Reserving open interfaces for special processes and special needs so that users can customize input templates according to their own process characteristics
Supporting PDK developers to complete development efficiently with high quality

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Highlights

Versatility

Support bulk silicon planar process, SOI process, BCD process, FinFET process, etc
Completeness

Support automatic generation of PCell components such as Symbol, CDF, Callback, View, etc
Efficiency

Rich and comprehensive PCell development functions to enhance development efficiency
Flexibility

Combination of standardized functions and customized functions to support user customization
Easy-to-use

Friendly GUI with mathematical expressions input
to reduce development difficulty

Applications

Automated PCell
development
Automated iPDK PCell
development
PCell source code
generation
Automatic conversion
from PDK to iPDK

Success Cases

The COT department of a leading Fabless company faced the challenge of an extended development on the PDK of a 40nm process platform. Their challenge requiring the addition of 30 specialized PCells within a constrained timeframe. Despite limited PCell development experience, the customer successfully completed the project adopting the PCellLab platform aided by its user-friendly GUI, extensive built-in customizable templates enriched with development expertise, and automatic code generation. With dedicated support from Primarius technical personnel, the customer rapidly acquired the necessary PDK development skills, greatly enhancing their COT development capabilities.
A leading Fab PDK team utilized the PCellLab platform when developing a PDK project encompassing nearly 200 devices. The team completing all PCell development and verification work within one month and halving the development cycle compared to traditional process. By leveraging the built-in templates and customizable interfaces within the PCellLab, the customer achieved efficient automation of PCell development, ensuring on-time and high-quality project delivery while significantly enhancing overall development capabilities.

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